
54
AT89C51RB2/RC2
4180E–8051–10/06
Table 42. BDRCON Register
BDRCON - Baud Rate Control Register (9Bh)
Reset Value = XXX0 0000b
Not bit addressablef
76
54
32
1
0
-
BRR
TBCK
RBCK
SPD
SRC
Bit
Number
Bit
Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4BRR
Baud Rate Run Control bit
Cleared to stop the internal Baud Rate Generator.
Set to start the internal Baud Rate Generator.
3TBCK
Transmission Baud rate Generator Selection bit for UART
Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.
Set to select internal Baud Rate Generator.
2RBCK
Reception Baud Rate Generator Selection bit for UART
Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.
Set to select internal Baud Rate Generator.
1
SPD
Baud Rate Speed Control bit for UART
Cleared to select the SLOW Baud Rate Generator.
Set to select the FAST Baud Rate Generator.
0SRC
Baud Rate Source select bit in Mode 0 for UART
Cleared to select FOSC/12 as the Baud Rate Generator (FCLK PERIPH/6 in X2
mode).
Set to select the internal Baud Rate Generator for UARTs in mode 0.